Delay Locked Loop (DLL) architectures are used in many applications to synchronize system clocks and to generate precise strobes in order to meet the stringent set up time and hold time requirement of the high speed system. Many DLL operating frequency ranges, however, are limited. One problem is that the loop may lock into a wrong phase.
Over different temperatures, voltages and processes variations, the operating range is hard to precisely control. What is needed is a way to prevent the DLL from locking into a wrong phase and is independent of process, temperature and voltage variation.